FPGA & Quartus first setup guide

FPGA & Quartus first setup guide

Dmitry Alekhine (@dmfrpro)


Overview of FPGA

FPGA (Field-Programmable Gate Array) is an integrated circuit that allows the developers to design a custom digital logic in the field.

Short video with elegant description of what is FPGA

FPGA vs General-Purpose Processor (GPP)

  1. ✅FPGA is reprogrammable: you define your own digital logic using HDL
  2. ✅FPGA has changeable ISA: you define your own ISA by designing logic circuits
  3. ✅FPGA is faster: generic architecture of GPP leads to looses in performance in comparison with specifically optimized solutions on FPGA and HDL
  4. ❌FPGA is expensive: depending on model and brand, but typically GPPs are cheaper
  5. ❌FPGA is energy inefficient: GPPs consume less power

Overview of MAX10 and Cyclone IV E

We will use the following 2 FPGA boards:

  1. MAX10 DE10-Lite (10M50DAF484C7G)
  2. Cyclone IV E A4-CE10 (EP4CE10E22C8N)
MAX 10 DE10-Lite (10M50DAF484C7G)


Cyclone IV E (EP4CE10E22C8N)
  1. Andrew Moore & Ron Wilson "FPGAs for dummies" - a free online book from Intel
  2. Intel Quartus Prime Pro and Standard Software User Guides
  3. DE10-Lite User Manual
  4. EP4CE10 User Manual

Installation process

Make sure that you have enabled CPU virtualization support. Otherwise, you will get errors during installation.

Virtualbox logo

Download and install Virtualbox, Extension Pack and VM image

Windows / Linux Distributions / OSX
Extension Pack

VM image (~13GB)

Make sure the version of Extension Pack is the same as your Virtualbox

Import Extension Pack:

Tools -> Preferences -> Extensions -> "+"
Select Extension Pack file and open it

Agree with the license terms and finish the installation.

Import VM image

Click "Import"
Select source: "Local File System", then click "^"
Select .ova file, open it and click Next
Configure the number of CPUs and RAM size depending on your PC hardware. Mark "Import hard drives as VDI" and click Import
Note: If you face "Kernel Panic - not syncing: Attempted to kill the idle task!", then you must increase number os CPUs and RAM size for your virtual machine.

Configure shared folder

Your virtual machine -> Settings -> Shared Folders -> Click on an existing one -> "Modify"
Configure the path and mountpoint (you can leave in blank, because Virtualbox can automatically mount it to ~/Desktop in your VM) and then click OK

Configure USB

Now it's time to connect an FPGA device to your PC. Both Cyclone IV and MAX10 should be recognized as Altera USB-Blaster(Altera).

Your virtual machine -> Settings -> USB -> Remove all USBs -> "+" -> Select "Altera USB-Blaster(ALtera)" and then click OK
Note: If the appropriate USB device is not listed in the drop-menu, then you should try the following fixes:

Windows: Install Altera USB-Blaster drivers

Linux #1: Add the corresponding udev rules using this guide
Linux #2: Add yourself to vboxusers group by typing this command:
sudo usermod -aG vboxusers your_username

You are almost there!

Let's start the virtual machine:

Select your virtual machine -> Start
Open Quartus -> Programmer
Click on Hardware Setup and make sure that the device is visible

Working with FPGAs on the labs

If everything went fine, you are ready to solve the problems during the lab sessions. Let's open a prepared project:

Ctrl+J -> Choose .qpf file which corresponds to your FPGA

For MAX10:
/home/user/QuartusProjects/Max10/Max10.qpf

For Cyclone IV: /home/user/QuartusProjects/Cyclone4/AC4E6E10_Golden_Top.qpf

Note: both projects are based on templates. For MAX10 there exists reasy template which you can choose during new project setup. For Cyclone4 we are using a custom template which is stored in /home/user/intelFPGA_lite/templates

Creating Block Diagrams

Ctrl+N -> Block Diagram/Schematic File -> OK

Let's create our first design. Double-click on the empty area and select a logic gate:

Double-click ont the empty area and find and2 logic gate, then click OK

Let's add more pins and connect them. For instance, we will use input pins, and2 and output pins. On the following diagrams you can see the base pinout for switches, LEDs, and buttons:

Max10 base pinout
Cyclone IV base pinout

Using these diagrams, let's label our pins correctly. For instance, out input pins will be SW[0] and SW[1], and the output pin is LEDR[0]:

Smaple block diagram for MAX10
Note: on Cyclone IV all the pins have reversed behavior. You should place not logic gate before each input and output pin

Let's save our first block diagram:

Ctrl+S -> Name Lab0.bdf -> Save

It's time to compile and flash the FPGA:

Choose "Files" and set Lab0.bdf as Top-Level Entity
Click "Start Compilation"
Open "Programmer", make sure you have connected FPGA, and then click "Start"

After a successful flash you can test your lab on FPGA. You can create several .bdf files, and, before flashing, set the preffered one as Top-Level Entity.

Writing verilog code

The pinout for both devices is the same as for block diagram files.

For MAX10: set DE10_LITE_Golden_Top.v as Top-Level Entity:

Select "Files" and then set DE10_LITE_Golden_Top.v as Top-Level Entity
Write your verilog code here

Then you can start compiltion and flash processes.

For Cyclone IV: set AC4E6E10_Golden_Top.v as Top-Level Entity:

Select "Files" and then set AC4E6E10_Golden_Top.v as Top-Level Entity

And then you must write your verilog code in AC4E6E10_Convenience_Wrapper.v:

Write your verilog code here

Then you can start compiltion and flash processes.

Enabling Simulation with ModelSim

To enable device simulation, you need to perform the following steps:

Select "Hierarchy" -> your device -> Settings...
Simulation -> mark "Run gate-level simulation after compilation"- > Apply -> OK

You are all set! After the compilation ModelSim will be opened, and the simulation process will begin.


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