Embedded Peripherals IP User Guide PDF ed133ce1
Embedded Peripherals IP User Guide
EmbeddedPeripheralsIPRYAN101InnovationDriveSanJoseCA95134wwwalteracomUG01085110UserGuideDocumentlastupdatedforAlteraCompleteDesignSuiteversionDocumentpublicationdate110June2011cySubscribe2011AlteraCorporationAllrightsreservedALTERAARRIACYCLONEHARDCOPYMAXMEGACORENIOSQUARTUSandSTRATIXareRegUSPatampTmOffandortrademarksofAlteraCorporationintheUSandothercountriesAllothertrademarksandservicemarksarethepropertyoftheirrespectiveholdersasdescribedatwwwalteracomcommonlegalhtmlAlterawarrantsperformanceofitssemiconductorproductstocurrentspecificationsinaccordancewithAlterasstandardwarrantybutreservestherighttomakechangestoanyproductsandservicesatanytimewithoutnoticeAlteraassumesnoresponsibilityorliabilityarisingoutoftheapplicationoruseofanyinformationproductorservicedescribedhereinexceptasexpresslyagreedtoinwritingbyAlteraAlteracustomersareadvisedtoobtainthelatestversionofdevicespecificationsbeforerelyingonanypublishedinformationandbeforeplacingordersforproductsorservicesQUALITY15090012008NSAICertifiedEmbeddedPeripheralsIPUserGuideJune2011AlteraCorporationNDTESYNContentsChapter1IntroductionToolsSupport2cesvedekoeSEEpereerEpeps11blueE11ObsolsceniCeciosyeRroaweyeteREUSURNhewasPeeSEESbeateevebeansvies12DocumentRevisionHistory112SectionOffChipInterfacePeripheralsChapter2SDRAMControllerCoreCoreOVERVIEWeapesEpceiquePuedeeepher21FunctionalDescriptionecepEERESGGnebesoetog22ANValonMMInterfaceeinehataeaten22OffChipSDRAMIiterfaceERAOREEYsCaeKepeascusaod23SignalTimingandElectricalCharacteristics23SynchronizingClockandData23ClockEnableNotSupported23SharingPinswithOtherAvalonMMTriStateDevices23BoardLayoutandPinoutConsiderations24PerformanceConsiderations2eeeRueHERRaebyaa24OpenRow24SharingDataandAddress24HardwareDesignandTargetDe
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